The present invention relates to a data processing system including a high-speed buffer memory.
In conventional digital computers, an instruction to be executed next is read out from a memory (that is, a main memory or a buffer memory) in which macro instructions (hereinafter referred to as "instruction") and data are stored, and an address for specifying data to be used for the execution of this instruction is determined by an instruction unit. Based upon this data address, corresponding data is read out from the above-mentioned memory, and thus the instruction is executed. The data read out from the memory has a predetermined length, for example, a length of 8 bytes. Read-out of data from the memory is not performed on data of 8 bytes starting from a given address position, but read-out is performed on data having a length of 8 bytes from the boundary position between two blocks each including 8 bytes. Accordingly, when data to be read out is located on both sides of the boundary position, the read-out operation must be performed twice, even if the length of the desired data is less than 8 bytes. In more detail, 8 bytes having an address smaller than the boundary position and 8 bytes having an address larger than the boundary position are subjected to respective read-out operations. Positioning between these two groups of 8-byte data is performed using an arithmetic unit so that the desired 8-byte data can be picked up from the two groups of 8-byte data. In the case where the positioning between two groups of data and the pick-up of data are performed using an arithmetic unit, a long processing time is required. In order to eliminate such a defect, data processing systems which include a circuit used only for the positioning and picking-up of data (hereinafter referred to as a "data converter"), are proposed in U.S. Pat. No. 3,858,183 and Japanese Patent Application (Laid-open No. 94133/78). In the former data processing system, data of 8 bytes including desired data of 4 bytes is read out from a memory, positioning of the read-out 8-byte data is performed by a data converter, and the desired data of 4 bytes is then picked up. In the latter data processing system, positioning of data of 16 bytes including desired data of up to 8 bytes is performed using a data converter, and the desired data of up to 8 bytes is picked up. If positioning and picking-up of optional data are performed using a data converter, as described above, the instruction processing time can be shortened.
In many digital computers each including a high-speed buffer memory, however, the buffer memory stores therein at one time data of a predetermined length, for example, data of 64 bytes. When data to be read out is located on both sides of the boundary position between two groups of 64-byte data, the readout operation has to be performed twice, even if the above-mentioned data converter is employed. That is, 8 bytes having an address smaller than the boundary position and 8 bytes having an address larger than the boundary position are read out, respectively. Then, positioning between the two groups of 8-byte data has to be performed using the data converter so that the desired 8-byte data can be picked up from these two groups of 8-byte data.